Field Programmable Gate Array Architecture

INTRODUCTION In the world of digital programmable FPGAs and ASICs play an important role in the implementation of complex designs. In today's world most applications use FPGAs to process data and create prototypes in real time. Due to its performance and reprogrammability, demand for FPGAs is increasing. The basic component of an FPGA is a logic block (configuration logic block or generic). Many applications and vendors claim to use FPGA or FPGA density in terms of gate count. The generated FPGA Usage Report shows the use of logic blocks, IO units, and other special resources such as RAM, DSP Core.

Summary As the field programmable gate array (FPGA) power consumption continues to increase, we need to develop low-power FPGA circuits, architectures, and computer-aided design (CAD) tools. Before designing a low-power FPGA circuit, architecture, or CAD tool, you first need to decide if the maximum savings (energy consumption) and these savings are cumulative. This article will focus on the FPGA CAD tool. Specifically, I will explain the CAD process which considers new power consumption for FPGA developed to answer the above question.

In early 2006, researchers at the Georgia Institute of Technology announced field programmable neural arrays. This chip is the first of increasingly complex arrays of floating gate transistors allowing charge programmability on MOSFET gates to simulate the channel ion properties of neurons in the brain, It is the first case. One Neuron In June 2012, spintronics researchers at Purdue University published papers on the design of neuromorphic chips using lateral spin valves and memory stators. They believe that the architecture works in the same way as neurons, so they can be used to test the way to reproduce brain processing. In addition, these chips are more energy efficient than traditional chips.

An FPGA (Field Programmable Gate Array) is an integrated circuit (IC) including a two-dimensional array of general-purpose logic circuits called cells or logic blocks whose functions are programmable. These units are connected to each other via a programmable bus. A field programmable gate array includes programmable elements that can be programmed to selectively interconnect any number of logic modules, interconnect routing architectures, and logic modules to each other and to define the functionality of the logic module. The basic device architecture of an FPGA consists of a configurable logic block (CLB) array embedded in a configurable interconnect structure and surrounded by a configurable I / O block (IOB). With IOB, you can drive the signal off-chip or connect the FPGA to the interconnect as needed. IOBs can usually perform other functions such as three-state output and registered input or output signals.