A Novel Path Selection Method for Small Delay Defects Test

Aggressive technology expansion has resulted in changes in manufacturing processes and increased diversity of statistics. Process variations lead to path length variations, thus creating potentially different critical path groups for different process angles and requiring consideration of process variations in the delay test method. In addition, due to process changes, critical paths are added to the critical / longest path set [4]. Therefore, in order to maintain the reliability of the circuit, it is necessary to improve the test method.

"The critical path approach brings significant clarity to the project, which is a visual explanation of your constraint balance vulnerability.If the activity on the path is delayed, the project will be delayed.The project is behind the plan If so, it's a good way to decide where to invest resources. "

Wong et al. By inserting a delay buffer and then fine-tuning the device, a method and CAD tool to minimize path delay variation in the ECL circuit were developed. The delay of each gate is fine-tuned by controlling the tail current (the function specific to the ECL circuit). This method is tested with circuits of normal structure, such as adders and multipliers, whose cost increases by 10% to 50% as the throughput increases by 2.5 times. Shenoyet et al. Express the logical balance problem as optimization process with short path constraint added. This technology is implemented as an experimental CAD tool linked with SIS logic synthesis system.

1) Test: Although the waveform pipeline technology looks like a composite circuit, it behaves like a sequential circuit, it is difficult to observe internal points in the circuit, so we present further challenges in the delay test. Further investigation is necessary to test the interaction of long and short paths and sequential error paths. 2) Low power consumption: Although clock load is reduced, wave pipeline technology tends to degrade delay variation at low power supply level, so it can not be said to be a low power technology. However, alternative low power methods such as dynamic power adjustment and power down techniques may be beneficial for wave pipeline technology.